We Are Hiring Foundation IP Front-end Engineer (FIP FE for EDA Views Development)

• CAREERS
• By: Max V
• Time: Mon-Apr-2024

Position: Foundation IP Front-end Engineer (Junior/Fresh Graduates)

• Job category: Engineering
• Job subcategory: EDA Views Design
• Location: Ho Chi Minh City, Vietnam

Responsibilities:

• Design logic and develop EDA views (Verilog, Gate Level Netlist, Liberty, ATPG, etc.)  for Embedded Memory IPs, Standard Cells, and IO Cells.
• Collaborate closely with Manager and engineering teams on assigned works.

Requirements:

• Bachelor’s or Master’s degree, Electronics Engineering, Electromechanics, Physics, Telecommunications; or related fields.
• Fresh graduates with GPA at least 2.5/4 or 7/10; or from 1 year experience in relevant jobs.
• Strong communication, documentation and analytical skills.

Preferred Experiences:

• Knowledge and experience in using EDA tools and softwares.
• Previous internship with Semiconductor companies.
• Research experience in relevant labs or open source design flow is a plus.